hvac fan delay interlock (graphical LD)¶


suite id	`g_hvac_fan_delay`
domain	hvac
language	LD-graphical
difficulty	easy
validation status	validated
origin	authored
license	CC-BY-4.0

Authored for this suite to cover this domain with genuine control logic

What is proved¶

From benchmarks/hvac/g_hvac_fan_delay/props.yaml. What each kind claims, and what it becomes on either route, is on The properties we prove.

id	kind	claim	requirement
`P1`	`mutual_exclusion`	never true together: `heat`, `cool`	Heating and cooling must never drive the plant simultaneously.

Variants¶

file	expected verdict	violates	method
`clean.xml`	SAFE	none	expert
`bomb.xml`	VIOLATION	`P1`	fault-injection

Files¶

file	what it is	size	sha256
`benchmark.yml`	benchmark metadata	1.0 KB	`26cc588f56d5`
`bomb.xml`	ladder program, PLCopen XML	3.8 KB	`3242c8dd20d2`
`clean.xml`	ladder program, PLCopen XML	3.4 KB	`8ffc7e5fdaa8`
`props.yaml`	property file	0.2 KB	`98a952136967`

Structured text, derived¶

Read off the ladder graph by runner/ld_to_st.py: every rung's contacts and coils rewritten as IEC 61131-3 assignments, in the same series/parallel logic the PLCopen XML encodes. This is a reading aid, not a second source of expected verdicts; ESBMC verifies the ladder program shown above, never this rendering.

bomb.xmlclean.xml

PROGRAM g_hvac_fan_delay_bomb
VAR_INPUT
    heat_call : BOOL;
    cool_call : BOOL;
    enable : BOOL;
    maint : BOOL;
END_VAR

VAR_OUTPUT
    heat : BOOL;
    cool : BOOL;
    fan : BOOL;
END_VAR


heat := (((NOT cool_call OR (cool_call AND maint)) AND heat_call) AND enable);
cool := (cool_call AND enable);
fan := enable;

END_PROGRAM

PROGRAM g_hvac_fan_delay_clean
VAR_INPUT
    heat_call : BOOL;
    cool_call : BOOL;
    enable : BOOL;
    maint : BOOL;
END_VAR

VAR_OUTPUT
    heat : BOOL;
    cool : BOOL;
    fan : BOOL;
END_VAR


heat := ((NOT cool_call AND heat_call) AND enable);
cool := (cool_call AND enable);
fan := enable;

END_PROGRAM

Recorded runs¶

A task can carry two routes. ld is ESBMC's ladder front end reading the program directly. via C is the same solver reached through Beremiz and MatIEC, which is the only route that reaches ST, IL, FBD and SFC; see How ESBMC-PLC works.

g_hvac_fan_delay__bomb (props.yaml, expected VIOLATION): v8.4 VIOLATION
g_hvac_fan_delay__bomb__viac via C (props.yaml, expected VIOLATION): master VIOLATION
g_hvac_fan_delay__clean (props.yaml, expected SAFE): v8.4 SAFE
g_hvac_fan_delay__clean__viac via C (props.yaml, expected SAFE): master SAFE