busbar interlock (graphical LD)¶


suite id	`g_busbar_interlock`
domain	power_substation
language	LD-graphical
difficulty	medium
validation status	validated
origin	authored
license	CC-BY-4.0

Authored for this suite to cover this domain with genuine control logic

What is proved¶

From benchmarks/power_substation/g_busbar_interlock/props.yaml. What each kind claims, and what it becomes on either route, is on The properties we prove.

id	kind	claim	requirement
`P1`	`mutual_exclusion`	never true together: `feeder_a`, `feeder_b`	Two feeders must never energise the bus in parallel.

Variants¶

file	expected verdict	violates	method
`clean.xml`	SAFE	none	expert
`bomb.xml`	VIOLATION	`P1`	fault-injection

Files¶

file	what it is	size	sha256
`benchmark.yml`	benchmark metadata	0.9 KB	`aa50a2f811b1`
`bomb.xml`	ladder program, PLCopen XML	2.9 KB	`8eb726599876`
`clean.xml`	ladder program, PLCopen XML	2.5 KB	`8ab832c60cfc`
`props.yaml`	property file	0.2 KB	`8a5b99cf7432`

Structured text, derived¶

Read off the ladder graph by runner/ld_to_st.py: every rung's contacts and coils rewritten as IEC 61131-3 assignments, in the same series/parallel logic the PLCopen XML encodes. This is a reading aid, not a second source of expected verdicts; ESBMC verifies the ladder program shown above, never this rendering.

bomb.xmlclean.xml

PROGRAM g_busbar_interlock_bomb
VAR_INPUT
    feeder_a_cmd : BOOL;
    feeder_b_cmd : BOOL;
    maint : BOOL;
END_VAR

VAR_OUTPUT
    feeder_a : BOOL;
    feeder_b : BOOL;
END_VAR


feeder_a := ((NOT feeder_b_cmd OR (feeder_b_cmd AND maint)) AND feeder_a_cmd);
feeder_b := feeder_b_cmd;

END_PROGRAM

PROGRAM g_busbar_interlock_clean
VAR_INPUT
    feeder_a_cmd : BOOL;
    feeder_b_cmd : BOOL;
    maint : BOOL;
END_VAR

VAR_OUTPUT
    feeder_a : BOOL;
    feeder_b : BOOL;
END_VAR


feeder_a := (NOT feeder_b_cmd AND feeder_a_cmd);
feeder_b := feeder_b_cmd;

END_PROGRAM

Recorded runs¶

A task can carry two routes. ld is ESBMC's ladder front end reading the program directly. via C is the same solver reached through Beremiz and MatIEC, which is the only route that reaches ST, IL, FBD and SFC; see How ESBMC-PLC works.

g_busbar_interlock__bomb (props.yaml, expected VIOLATION): v8.4 VIOLATION
g_busbar_interlock__bomb__viac via C (props.yaml, expected VIOLATION): master VIOLATION
g_busbar_interlock__clean (props.yaml, expected SAFE): v8.4 SAFE
g_busbar_interlock__clean__viac via C (props.yaml, expected SAFE): master SAFE